191
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VLSID
2006
IEEE
16 years 7 months ago
2006
IEEE
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
168
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VLSID
2006
IEEE
16 years 7 months ago
2006
IEEE
In the multi-GHz frequency domain, inductive and capacitive parasitics of interconnects can cause significant 'ringing' or overdamping, which may lead to false switching...
210
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
188
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
204
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
Title of thesis: EFFICIENT AND ACCURATE STATISTICAL TIMING ANALYSIS FOR NON-LINEAR NON-GAUSSIAN VARIABILITY WITH INCREMENTAL ATTRIBUTES Ashish Dobhal, Master of Science, 2006 Thes...
174
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
246
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
150
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional ...