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VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
16 years 7 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...
VLSID
2007
IEEE
128views VLSI» more  VLSID 2007»
16 years 7 months ago
A Low Power Frequency Multiplication Technique for ZigBee Transciever
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
Jagdish Nayayan Pandey, Sudhir S. Kudva, Bharadwaj...
VLSID
2007
IEEE
120views VLSI» more  VLSID 2007»
16 years 7 months ago
VLSI Architecture for Matrix Inversion using Modified Gram-Schmidt based QR Decomposition
Chitranjan K. Singh, Sushma Honnavara Prasad, Pora...
VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
16 years 7 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
VLSID
2007
IEEE
92views VLSI» more  VLSID 2007»
16 years 7 months ago
Floorplanning in Modern FPGAs
State-of-the-art FPGA architectures have millions of gates in CLBs, Block RAMs, and Multiplier blocks which can host fairly large designs. While their physical design calls for oor...
Pritha Banerjee, Susmita Sur-Kolay, Arijit Bishnu
VLSID
2007
IEEE
91views VLSI» more  VLSID 2007»
16 years 7 months ago
Reusing Learned Information in SAT-based ATPG
The robustness of engines for ATPG has to be improved to cope with the growing size of circuits. Recently, SAT-based ATPG approaches have been shown to be very robust even on larg...
Görschwin Fey, Rolf Drechsler, Tim Warode
VLSID
2007
IEEE
160views VLSI» more  VLSID 2007»
16 years 7 months ago
Deep Submicron Technology: Opportunity or Dead End for Dynamic Circuit Techniques
Claas Cornelius, Frank Grassert, Siegmar Koppe, Di...
VLSID
2007
IEEE
107views VLSI» more  VLSID 2007»
16 years 7 months ago
Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM
Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, ...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
16 years 7 months ago
Application Specific Datapath Extension with Distributed I/O Functional Units
Performance of an application can be improved through augmenting the processor with Application specific Functional Units (AFUs). Usually a cluster of operations identified from th...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
VLSID
2007
IEEE
153views VLSI» more  VLSID 2007»
16 years 7 months ago
Extracting Logic Circuit Structure from Conjunctive Normal Form Descriptions
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
Zhaohui Fu, Sharad Malik