In this article we address efficiency issues in implementation of Monte Carlo algorithm for 3D capacitance extraction. Error bounds in statistical capacitance estimation are discus...
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. ...
In the streaming video processing domain, the only way to meet strict performance and quality requirements and yet to provide the area- and power-wise optimal platform is to apply...
Aleksandar Beric, Ramanathan Sethuraman, Jef L. va...
This paper presents a novel architecture using the decorrelating (DECOR) transformation technique when applied to an LMS adaptive filter. The DECOR transform has been evaluated pr...
Mark P. Tennant, Ahmet T. Erdogan, Tughrul Arslan,...
This paper presents a novel custom-reconfigurable architecture, which is tailored to accomplish the electronic circuits associated with MEMS vibratory sensors. The paradigm of thi...
Evangelos F. Stefatos, Tughrul Arslan, Didier Keym...
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
Thomas D. Richardson, Chrysostomos Nicopoulos, Don...
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
Jungsub Kim, Mary Jane Irwin, Narayanan Vijaykrish...