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» Dimensionality reduction and generalization
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PATMOS
2004
Springer
15 years 12 months ago
Sleepy Stack Reduction of Leakage Power
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption as...
Jun-Cheol Park, Vincent John Mooney III, Philipp P...
ISCA
2003
IEEE
107views Hardware» more  ISCA 2003»
15 years 12 months ago
Positional Adaptation of Processors: Application to Energy Reduction
Although adaptive processors can exploit application variability to improve performance or save energy, effectively managing their adaptivity is challenging. To address this probl...
Michael C. Huang, Jose Renau, Josep Torrellas
SC
2003
ACM
15 years 11 months ago
Optimizing Reduction Computations In a Distributed Environment
We investigate runtime strategies for data-intensive applications that involve generalized reductions on large, distributed datasets. Our set of strategies includes replicated fi...
Tahsin M. Kurç, Feng Lee, Gagan Agrawal, &U...
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
15 years 11 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
DEON
2006
Springer
15 years 10 months ago
Strategic Deontic Temporal Logic as a Reduction to ATL, with an Application to Chisholm's Scenario
In this paper we extend earlier work on deontic deadlines in CTL to the framework of alternating time temporal logic (ATL). The resulting setting enables us to model several concep...
Jan Broersen