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IUI
2012
ACM
14 years 2 months ago
Automatic reverse engineering of interactive dynamic web applications to support adaptation across platforms
The effort and time required to develop user interface models has been one of the main limitations to the adoption of model-based approaches, which enable intelligent processing o...
Federico Bellucci, Giuseppe Ghiani, Fabio Patern&o...
IUI
2012
ACM
14 years 2 months ago
Performance comparisons of phrase sets and presentation styles for text entry evaluations
We empirically compare five different publicly-available phrase sets in two large-scale (N = 225 and N = 150) crowdsourced text entry experiments. We also investigate the impact ...
Per Ola Kristensson, Keith Vertanen
ISPD
2012
ACM
248views Hardware» more  ISPD 2012»
14 years 2 months ago
A fast estimation of SRAM failure rate using probability collectives
Importance sampling is a popular approach to estimate rare event failures of SRAM cells. We propose to improve importance sampling by probability collectives. First, we use “Kul...
Fang Gong, Sina Basir-Kazeruni, Lara Dolecek, Lei ...
ISPD
2012
ACM
289views Hardware» more  ISPD 2012»
14 years 2 months ago
Keep it straight: teaching placement how to better handle designs with datapaths
As technology scales and frequency increases, a new design style is emerging, referred to as hybrid designs, which contain a mixture of random logic and datapath standard cell com...
Samuel I. Ward, Myung-Chul Kim, Natarajan Viswanat...
ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
14 years 2 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang
ISPD
2012
ACM
252views Hardware» more  ISPD 2012»
14 years 2 months ago
Towards layout-friendly high-level synthesis
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...
ISPD
2012
ACM
234views Hardware» more  ISPD 2012»
14 years 2 months ago
MAPLE: multilevel adaptive placement for mixed-size designs
We propose a new multilevel framework for large-scale placement called MAPLE that respects utilization constraints, handles movable macros and guides the transition between global...
Myung-Chul Kim, Natarajan Viswanathan, Charles J. ...
ISPD
2012
ACM
283views Hardware» more  ISPD 2012»
14 years 2 months ago
Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...
ISAIM
2012
166views more  ISAIM 2012»
14 years 2 months ago
Bribery in Voting Over Combinatorial Domains Is Easy
Nicholas Mattei, Maria Silvia Pini, Francesca Ross...
IS
2012
14 years 2 months ago
View determinacy for preserving selected information in data transformations
When transforming data one often wants certain information in the data source to be preserved, i.e., we identify parts of the source data and require these parts to be transformed...
Wenfei Fan, Floris Geerts, Lixiao Zheng