179
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DAC
2010
ACM
15 years 9 months ago
2010
ACM
System optimization techniques based on dynamic voltage scaling (DVS) are widely used with the aim of reducing processor energy consumption. Inter-task DVS assigns the same voltag...
163
Voted
ISLPED
1996
ACM
15 years 10 months ago
1996
ACM
We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling pro...
156
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ISCAS
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper introduces a static multi-level memory cell that was conceived to store state variables in neuromorphic onchip learning applications. It consists of a capacitance that ...
171
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DSN
2003
IEEE
15 years 11 months ago
2003
IEEE
Energy constrained complex real-time systems are becoming increasingly important in defense, space, and consumer applications. In this paper, we present a sensible heuristic to ad...
161
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ISCAS
2007
IEEE
16 years 2 days ago
2007
IEEE
Abstract—In the nanometer-scale CMOS technology, the gateoxide thickness has been scaled down to support a higher operating speed under a lower power supply (1xVDD). However, the...
196
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SOCC
2008
IEEE
16 years 5 days ago
2008
IEEE
— Scaling down the voltage levels of the processing elements (PEs) in a Network-on-Chip (NoC) can significantly reduce the computation energy consumption with an overhead of the...