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ASAP
2009
IEEE
182views Hardware» more  ASAP 2009»
16 years 3 months ago
NeMo: A Platform for Neural Modelling of Spiking Neurons Using GPUs
—Simulating spiking neural networks is of great interest to scientists wanting to model the functioning of the brain. However, large-scale models are expensive to simulate due to...
Andreas Fidjeland, Etienne B. Roesch, Murray Shana...
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 3 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang
ICCD
2005
IEEE
108views Hardware» more  ICCD 2005»
16 years 3 months ago
Methods for Modeling Resource Contention on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Danie...
ICCD
2003
IEEE
111views Hardware» more  ICCD 2003»
16 years 3 months ago
Reducing Operand Transport Complexity of Superscalar Processors using Distributed Register Files
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed re...
Santithorn Bunchua, D. Scott Wills, Linda M. Wills
ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
16 years 3 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...