The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
In this paper, a system for automatic albuming of consumer photographs is described, and its specific core components of event segmentation and screening of low quality images are...
A methodology for reducing ground bounce in typical microprocessors and image processing architectures has been described. As we approach Gigascale Integration, chip power consump...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Viv...
This paper examines the impact of the primary symmetric key cryptographic operation on network data streams, encryption of user data, have on the overall tra c throughput. The encr...
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...