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188
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DDECS
2009
IEEE
16 years 1 months ago
2009
IEEE
—Quasi Delay Insensitive asynchronous logic is a very robust system allowing safe implementations while requiring minimal timing assumptions. Unfortunately the design methodologi...
145
Voted
DDECS
2009
IEEE
16 years 1 months ago
2009
IEEE
– A low power all-digital phase locked-loop (ADPLL) in a 0.13um CMOS process is presented. The pulse-based digitally controlled oscillator (PB-DCO) performs a high resolution and...
181
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EUROMICRO
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—The component-based and service-oriented development have become commonly used techniques for building high quality, evolvable, large systems in a timely and affordable ...
171
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FOCS
2009
IEEE
16 years 1 months ago
2009
IEEE
We prove that the problem of computing an Arrow-Debreu market equilibrium is PPAD-complete even when all traders use additively separable, piecewise-linear and concave utility fun...
149
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GLOBECOM
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract— Fairness index among competing hosts in communication networks is an important system measurement. Several fairness index measurements have been proposed in the technic...