Abstract. Despite more then 30 years of research on protocol specification, the major protocols deployed in the Internet, such as TCP, are described only in informal prose RFCs and...
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
This paper introduces a method of constructing random number generators from four of the basic primitives provided by FPGAs: Flip-Flips, Lookup-Tables, Shift Registers, and RAMs. ...
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...