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ASMTA
2008
Springer
100views Mathematics» more  ASMTA 2008»
15 years 8 months ago
A Tandem Queueing Model for Delay Analysis in Disconnected Ad Hoc Networks
Ad hoc network routing protocols may fail to operate in the absence of an end-to-end connection from source to destination. This deficiency can be resolved by so-called delay-toler...
Ahmad Al Hanbali, Roland de Haan, Richard J. Bouch...
ASPDAC
2008
ACM
109views Hardware» more  ASPDAC 2008»
15 years 8 months ago
TCG-based multi-bend bus driven floorplanning
Abstract--In this paper, the problem of bus driven floorplanning is addressed. Given a set of modules and bus specifications, a floorplan solution including the bus routes will be ...
Tilen Ma, Evangeline F. Y. Young
ASPDAC
2008
ACM
107views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Full-chip thermal analysis for the early design stage via generalized integral transforms
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...
Pei-Yu Huang, Chih-Kang Lin, Yu-Min Lee
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Low power clock buffer planning methodology in F-D placement for large scale circuit design
Traditionally, clock network layout is performed after cell placement. Such methodology is facing a serious problem in nanometer IC designs where people tend to use huge clock buff...
Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xian...
167
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ASPLOS
2008
ACM
15 years 8 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
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