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201
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
198
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
Power gating is one of the most effective techniques in reducing the standby leakage current of VLSI circuits. In this paper we introduce a new approach for sleep transistor sizin...
116
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
— In the face of increased process variations, at-speed manufacturing test is necessary to detect subtle delay defects. This procedure necessarily tests chips at a slightly highe...
170
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
The NETWORK-ON-CHIP (NOC) interconnection paradigm has been gaining momentum thanks to its flexibility, scalability and suitability to deep submicron technology processes. The ne...
176
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of s...