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ASIACRYPT
2007
Springer
15 years 10 months ago
On Efficient Message Authentication Via Block Cipher Design Techniques
In an effort to design a MAC scheme that is built using block cipher components and runs faster than the modes of operation for message authentication, Daemen and Rijmen have propo...
Goce Jakimoski, K. P. Subbalakshmi
ASPDAC
2007
ACM
82views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Low-Power High-Speed 180-nm CMOS Clock Drivers
- The power dissipation (PT) and delay time (tdT) of a CMOS clock driver were minimized. Eight test circuits, each of which has 2 two-stage clock drivers, and a register array were...
Tadayoshi Enomoto, Suguru Nagayama, Nobuaki Kobaya...
ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
15 years 10 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov
168
Voted
ASPDAC
2007
ACM
88views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Voltage Island Generation under Performance Requirement for SoC Designs
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
Wai-Kei Mak, Jr-Wei Chen
ASPDAC
2007
ACM
133views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Modeling Sub-90nm On-Chip Variation Using Monte Carlo Method for DFM
- For sub-90nm technology nodes and below, random fluctuations of within-die physical process properties are also known as random on-chip variation (OCV). It impacts on the VLSI/So...
Jun-Fu Huang, Victor C. Y. Chang, Sally Liu, Kelvi...
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