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ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
16 years 4 days ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
ISCAS
2006
IEEE
160views Hardware» more  ISCAS 2006»
16 years 4 days ago
Address-event image sensor network
We describe a sensor network based on smart requirements of the network. This will provide a new approach imager sensors able to extract events of interest from a scene. for compos...
Eugenio Culurciello, Andreas Savvides
ISCAS
2006
IEEE
81views Hardware» more  ISCAS 2006»
16 years 4 days ago
Fully programmable bias current generator with 24 bit resolution per bias
This paper describes an on-chip programmable bias current generator, intended for mixed signal chips requiring a wide ranging set of currents. The individual generators share a ma...
Tobi Delbrück, Patrick Lichtsteiner
ISCAS
2006
IEEE
121views Hardware» more  ISCAS 2006»
16 years 4 days ago
A frequency domain based TEQ design for DSL systems
that the equivalent channel is approximately an impulse. In [7], Martin et al. propose a globally convergent blind adap-In this paper, we propose a frequency domain based de- tive ...
Yuan-Pei Lin, Yu-Pin Lin, See-May Phoong
ISCAS
2006
IEEE
169views Hardware» more  ISCAS 2006»
16 years 4 days ago
An Address-Event Image Sensor Network
We discuss an imaging architecture for sensor pixel in the ALOHA signals an event when a certain amount network applications, that employs a 32 x 32 Address-Event of photons are re...
Thiago Teixeira, Eugenio Culurciello, Andreas G. A...
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