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ASPDAC
2005
ACM
101views Hardware» more  ASPDAC 2005»
15 years 8 months ago
A wideband hierarchical circuit reduction for massively coupled interconnects
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan
CASES
2005
ACM
15 years 8 months ago
Automating custom-precision function evaluation for embedded processors
Due to resource and power constraints, embedded processors often cannot afford dedicated floating-point units. For instance, the IBM PowerPC processor embedded in Xilinx Virtex-...
Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne ...
CF
2005
ACM
15 years 8 months ago
Reducing misspeculation overhead for module-level speculative execution
Thread-level speculative execution is a technique that makes it possible for a wider range of single-threaded applications to make use of the processing resources in a chip multip...
Fredrik Warg, Per Stenström
COMPGEOM
2005
ACM
15 years 8 months ago
Shortest path amidst disc obstacles is computable
An open question in Exact Geometric Computation is whether there are transcendental computations that can be made “geometrically exact”. Perhaps the simplest such problem in c...
Ee-Chien Chang, Sung Woo Choi, DoYong Kwon, Hyungj...
COMPSAC
2005
IEEE
15 years 8 months ago
A Low-Latency Checkpointing Scheme for Mobile Computing Systems
Fault-tolerant mobile computing systems have different requirements and restrictions, not taken into account by conventional distributed systems. This paper presents a coordinate...
Guohui Li, LihChyun Shu