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ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
16 years 9 days ago
A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems
—This paper proposes a programmable geometry engine (GE) reducing the expensive internal buffers and register files of the conventional programmable GEs and sharing datapaths of ...
Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
16 years 9 days ago
N-scroll chaotic attractors from a general jerk circuit
— This paper proposes a novel nonlinear modulating function approach for generating n−scroll chaotic attractors based on a general jerk circuit. The systematic nonlinear modula...
Simin Yu, Jinhu Lu, Henry Leung, Guanrong Chen
135
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ISCAS
2005
IEEE
162views Hardware» more  ISCAS 2005»
16 years 9 days ago
Capacitive coupling of data and power for 3D silicon-on-insulator VLSI
— We designed a 3D integrated multi-chip module that uses non-galvanic capacitive coupling to provide bi-directional communication and exchange power supply between two separate ...
Eugenio Culurciello, Andreas G. Andreou
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
16 years 9 days ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...
ISCAS
2005
IEEE
139views Hardware» more  ISCAS 2005»
16 years 9 days ago
A frequency-domain SIR maximizing time-domain equalizer for VDSL systems
In this paper we propose a semi-blind time domain equalizer (TEQ) design method that maximize SIR (signal-tointerference ratio) in frequency domain for VDSL systems. The proposed ...
Yuan-Pei Lin, Li-Han Liang, Pei-Ju Chung, See-May ...