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ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
15 years 11 months ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
15 years 11 months ago
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle co...
Dongkun Shin, Jihong Kim
ISPD
2003
ACM
89views Hardware» more  ISPD 2003»
15 years 11 months ago
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning
Traditional multilevel partitioning approaches have shown good performance with respect to cutsize, but offer no guarantees with respect to system performance. Timing-driven part...
Andrew B. Kahng, Xu Xu
ITICSE
2003
ACM
15 years 11 months ago
Structuring CSed research studies: connecting the pieces
Changing conditions for teaching increase our motivation to understand the teaching and learning process. First time investigators of educational settings often feel uncertain abo...
Arnold Neville Pears, Mats Daniels
ITICSE
2003
ACM
15 years 11 months ago
The evaluation of electronic marking of examinations
This paper discusses an approach to the electronic (automatic) marking of examination papers, in particular, the extent to which it is possible to mark a candidate’s answers aut...
Pete Thomas