This paper introduces an approach for closer integration of selforganizing maps into the visualization of spatio-temporal phenomena in GIS. It is proposed to provide a more explic...
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features, depending on the local ...
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...