Sciweavers

2645 search results - page 187 / 529
» time 2003
Sort
View
ATS
2003
IEEE
98views Hardware» more  ATS 2003»
15 years 11 months ago
Automatic Design Validation Framework for HDL Descriptions via RTL ATPG
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
Liang Zhang, Michael S. Hsiao, Indradeep Ghosh
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 11 months ago
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
Michael Nicolaidis, Nadir Achouri, Slimane Boutobz...
VLSID
2003
IEEE
92views VLSI» more  VLSID 2003»
16 years 6 months ago
Energy Efficient Scheduling for Datapath Synthesis
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
Saraju P. Mohanty, N. Ranganathan
SIGMOD
2003
ACM
152views Database» more  SIGMOD 2003»
16 years 6 months ago
Warping Indexes with Envelope Transforms for Query by Humming
A Query by Humming system allows the user to find a song by humming part of the tune. No musical training is needed. Previous query by humming systems have not provided satisfacto...
Yunyue Zhu, Dennis Shasha
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 3 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim