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TSMC
2002
98views more  TSMC 2002»
15 years 6 months ago
The STAR automaton: expediency and optimality properties
Abstract--We present the STack ARchitecture (STAR) automaton. It is a fixed structure, multiaction, reward-penalty learning automaton, characterized by a star-shaped state transiti...
Anastasios A. Economides, Athanasios Kehagias
TVLSI
2002
121views more  TVLSI 2002»
15 years 6 months ago
On-chip decoupling capacitor optimization using architectural level prediction
Switching activity-generated power-supply grid-noise presents a major obstacle to the reduction of supply voltage in future generation semiconductor technologies. A popular techniq...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills
TVLSI
2002
93views more  TVLSI 2002»
15 years 6 months ago
Simultaneous switching noise in on-chip CMOS power distribution networks
Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra lar...
Kevin T. Tang, Eby G. Friedman
TVLSI
2002
78views more  TVLSI 2002»
15 years 6 months ago
Managing on-chip inductive effects
With process technology and functional integration advancing steadily, chips are continuing to grow in area while critical dimensions are shrinking. This has led to the emergence o...
Yehia Massoud, Steve S. Majors, Jamil Kawa, Tareq ...
TVLSI
2002
84views more  TVLSI 2002»
15 years 6 months ago
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
Ing-Jer Huang, Ping-Huei Xie