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166
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DATE
2007
IEEE
105views Hardware» more  DATE 2007»
16 years 1 months ago
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, ...
160
Voted
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
16 years 1 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
DATE
2007
IEEE
109views Hardware» more  DATE 2007»
16 years 1 months ago
Area optimization of multi-cycle operators in high-level synthesis
Conventional high-level synthesis algorithms usually employ multi-cycle operators to reduce the cycle length in order to improve the circuit performance. These operators need seve...
María C. Molina, Rafael Ruiz-Sautua, Jose M...
160
Voted
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
16 years 1 months ago
QuteSAT: a robust circuit-based SAT solver for complex circuit structure
We propose a robust circuit-based Boolean Satisfiability (SAT) solver, QuteSAT, that can be applied to complex circuit netlist structure. Several novel techniques are proposed in ...
Chi-An Wu, Ting-Hao Lin, Chih-Chun Lee, Chung-Yang...
164
Voted
DSD
2007
IEEE
120views Hardware» more  DSD 2007»
16 years 1 months ago
Cotransformation Provides Area and Accuracy Improvement in an HDL Library for LNS Subtraction
The reduction of the cumbersome operations of multiplication, division, and powering to addition, subtraction and multiplication is what makes the Logarithmic Number System (LNS) ...
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Ar...