Sciweavers

3928 search results - page 729 / 786
» order 2006
Sort
View
ISCAS
2006
IEEE
118views Hardware» more  ISCAS 2006»
16 years 4 days ago
Complex network topologies and synchronization
Synchronization in networks with different topolo- is shown that for typical systems only three main scenarios gies is studied. We show that for a large class of oscillators there ...
Paolo Checco, Mario Biey, Gábor Vattay, Lju...
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
16 years 4 days ago
Phase measurement and adjustment of digital signals using random sampling technique
—This paper introduces a technique to measure and adjust the relative phase of on-chip high speed digital signals using a random sampling technique of inferential statistics. The...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
16 years 4 days ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
ISESE
2006
IEEE
16 years 4 days ago
An empirical study of developers views on software reuse in statoil ASA
In this article, we describe the results from our survey in the ITdepartment of a large Oil and Gas company in Norway (Statoil ASA), in order to characterize developers’ views o...
Odd Petter N. Slyngstad, Anita Gupta, Reidar Conra...
ISPASS
2006
IEEE
16 years 4 days ago
Automatic testcase synthesis and performance model validation for high performance PowerPC processors
The latest high-performance IBM PowerPC microprocessor, the POWER5 chip, poses challenges for performance model validation. The current stateof-the-art is to use simple hand-coded...
Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John,...