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PACS
2004
Springer
115views Hardware» more  PACS 2004»
15 years 12 months ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...
PACS
2004
Springer
146views Hardware» more  PACS 2004»
15 years 12 months ago
An Optimized Front-End Physical Register File with Banking and Writeback Filtering
In recent years, processor manufacturers have converged on two types of register file architectures. Both IBM with its POWER series and Intel with its Pentium series are using a ...
Miquel Pericàs, Rubén Gonzále...
PADL
2004
Springer
15 years 12 months ago
Symbolic Execution of Behavioral Requirements
Message Sequence Charts (MSC) have traditionally been used as a weak form of behavioral requirements in software design; they denote scenarios which may happen. Live Sequence Chart...
Tao Wang, Abhik Roychoudhury, Roland H. C. Yap, S....
PAM
2004
Springer
15 years 12 months ago
Measurements and Laboratory Simulations of the Upper DNS Hierarchy
Given that the global DNS system, especially at the higher root and top-levels, experiences significant query loads, we seek to answer the following questions: (1) How does the ch...
Duane Wessels, Marina Fomenkov, Nevil Brownlee, Ki...
PARA
2004
Springer
15 years 12 months ago
Supporting Location-Aware Distributed Applications on Mobile Devices
ct The Wireless World Research Forum (WWRF) has identified ambient-awareness and device diversity as two key properties of applications and services in future mobile systems [1]. ...
Cristiano di Flora, Massimo Ficco, Stefano Russo
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