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NOCS
2008
IEEE
16 years 9 days ago
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration
Bin Li, Li-Shiuan Peh, Priyadarsan Patra
NOCS
2008
IEEE
16 years 9 days ago
Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture
Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, ...
124
Voted
NOCS
2008
IEEE
16 years 9 days ago
A Network of Time-Division Multiplexed Wiring for FPGAs
Rosemary M. Francis, Simon W. Moore, Robert D. Mul...