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177
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GLVLSI
2006
IEEE
16 years 1 months ago
2006
IEEE
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
207
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GLVLSI
2006
IEEE
16 years 1 months ago
2006
IEEE
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
183
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GLVLSI
2006
IEEE
16 years 1 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
196
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GLVLSI
2006
IEEE
16 years 1 months ago
2006
IEEE
3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...
168
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GMP
2006
IEEE
16 years 1 months ago
2006
IEEE
Abstract. The need for robust solutions for sets of non-linear multivariate constraints or equations needs no motivation. Subdivision-based multivariate constraint solvers [1–3] ...