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ISCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...
163
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ISCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
175
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ISCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
241
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ISCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāspecific operations. We report our experience with Chimae...
154
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ISCC
2000
IEEE
15 years 11 months ago
2000
IEEE
-- In a WAN established infrastructure, one of the main problems ATM network planners and users face, when greater than T1/E1 bandwidth is required, is the high cost associated to ...