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IPPS
2000
IEEE
15 years 11 months ago
Three Dimensional VLSI-Scale Interconnects
As processor speeds rapidly approach the Giga-Hertz regime, the disparity between process time and memory access time plays an increasing role in the overall limitation of processo...
Dennis W. Prather
IPPS
2000
IEEE
15 years 11 months ago
PaDDMAS: Parallel and Distributed Data Mining Application Suite
Discovering complex associations, anomalies and patterns in distributed data sets is gaining popularity in a range of scientific, medical and business applications. Various algor...
Omer F. Rana, David W. Walker, Maozhen Li, Steven ...
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
15 years 11 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
15 years 11 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...
ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
15 years 11 months ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
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