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ISPASS
2006
IEEE
16 years 18 days ago
Automatic testcase synthesis and performance model validation for high performance PowerPC processors
The latest high-performance IBM PowerPC microprocessor, the POWER5 chip, poses challenges for performance model validation. The current stateof-the-art is to use simple hand-coded...
Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John,...
ISPASS
2006
IEEE
16 years 18 days ago
Simulation sampling with live-points
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
Thomas F. Wenisch, Roland E. Wunderlich, Babak Fal...
MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
16 years 18 days ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
MICRO
2006
IEEE
124views Hardware» more  MICRO 2006»
16 years 18 days ago
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks
Computer security is severely threatened by software vulnerabilities. Prior work shows that information flow tracking (also referred to as taint analysis) is a promising techniqu...
Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yua...
ASPLOS
2006
ACM
16 years 17 days ago
Bell: bit-encoding online memory leak detection
Memory leaks compromise availability and security by crippling performance and crashing programs. Leaks are difficult to diagnose because they have no immediate symptoms. Online ...
Michael D. Bond, Kathryn S. McKinley
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