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DCC
2002
IEEE
16 years 6 months ago
Rate-Based versus Distortion-Based Optimal Joint Source-Channel Coding
- We consider a joint source-channel coding system that protects an embedded wavelet bitstream against noise using a finite family of channel codes with error detection and error c...
Raouf Hamzaoui, Vladimir Stankovic
PPOPP
2010
ACM
16 years 3 months ago
Using data structure knowledge for efficient lock generation and strong atomicity
To achieve high-performance on multicore systems, sharedmemory parallel languages must efficiently implement atomic operations. The commonly used and studied paradigms for atomici...
Gautam Upadhyaya, Samuel P. Midkiff, Vijay S. Pai
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
16 years 3 months ago
Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses
— The influence of interconnects on processor performance and cost is becoming increasingly pronounced with technology scaling. In this paper, we present a fast compression sche...
Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Maha...
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
16 years 3 months ago
Counter-Based Cache Replacement Algorithms
Recent studies have shown that in highly associative caches, the performance gap between the Least Recently Used (LRU) and the theoretical optimal replacement algorithms is large,...
Mazen Kharbutli, Yan Solihin
ICCD
2004
IEEE
101views Hardware» more  ICCD 2004»
16 years 3 months ago
Increasing Processor Performance Through Early Register Release
Modern superscalar microprocessors need sizable register files to support large number of in-flight instructions for exploiting ILP. An alternative to building large register file...
Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kan...
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