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LCPC
1998
Springer
15 years 11 months ago
A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality
We present a cache locality optimization technique that can optimize a loop nest even if the arrays referenced have different layouts in memory. Such a capability is required for a...
Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhar...
LCPC
1998
Springer
15 years 11 months ago
Compiling for SIMD Within a Register
Although SIMD (Single Instruction stream Multiple Data stream) parallel computers have existed for decades, it is only in the past few years that a new version of SIMD has evolved...
Randall J. Fisher, Henry G. Dietz
LCPC
1998
Springer
15 years 11 months ago
Copy Elimination for Parallelizing Compilers
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
LCR
1998
Springer
137views System Software» more  LCR 1998»
15 years 11 months ago
Integrated Task and Data Parallel Support for Dynamic Applications
There is an emerging class of real-time interactive applications that require the dynamic integration of task and data parallelism. An example is the Smart Kiosk, a free-standing ...
James M. Rehg, Kathleen Knobe, Umakishore Ramachan...
LCTRTS
1998
Springer
15 years 11 months ago
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
Thomas Lundqvist, Per Stenström
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