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EUROPAR
2006
Springer
15 years 10 months ago
A Multi-level Scheduler for the Grid Computing YML Framework
This paper presents the integration of a multi-level scheduler in the YML architecture. It demonstrates the advantages of this architecture based on a component model and why it is...
Sébastien Noël, Olivier Delannoy, Nahi...
FPGA
2006
ACM
98views FPGA» more  FPGA 2006»
15 years 10 months ago
Efficient use of communications between an FPGA's embedded processor and its reconfigurable logic
Abstract-- Increasing device densities allow chip manufacturers to integrate more functionality onto a single piece of silicon. FPGA manufacturers, such as Xilinx and Altera, use t...
Joshua Noseworthy, Miriam Leeser
AINA
2006
IEEE
15 years 8 months ago
HoNeY: a MHP-based Platform for HOme NEtwork interoperability
Home networks enable, potentially, an increased level of integration among appliances present in the house, enabling an ubiquitous control of devices and simplifying man/machine i...
Fabio Forno, Giovanni Malnati, Giuseppe Portelli
DMIN
2006
123views Data Mining» more  DMIN 2006»
15 years 8 months ago
Novel Evaluation Framework of Intrusion Detection Systems with Respect to Security Policies
Intrusion Detection System is an integral component of the computer security infrastructure. It is usually put in place to detect computer security policy violations. While its ro...
Negmat Mullodzhanov
EACL
2006
ACL Anthology
15 years 8 months ago
Grammatical Role Labeling with Integer Linear Programming
In this paper, we present a formalization of grammatical role labeling within the framework of Integer Linear Programming (ILP). We focus on the integration of subcategorization i...
Manfred Klenner