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    ICCAD
    2005
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    Storage assignment during high-level synthesis for configurable architectures
    16 years 4 months ago
    Storage assignment during high-level synthesis for configurable architectures
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    Wenrui Gong, Gang Wang, Ryan Kastner
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    2005
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    Dynamic voltage scaling for the schedulability of jitter-constrained real-time embedded systems
    16 years 4 months ago
    Dynamic voltage scaling for the schedulability of jitter-constrained real-time embedded systems
    Download  www.cse.nd.edu
    Bren Mochocki, Razvan Racu, Rolf Ernst
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    ICCAD
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    Embedded tutorial: formal equivalence checking between system-level models and RTL
    16 years 1 months ago
    Embedded tutorial: formal equivalence checking between system-level models and RTL
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    Alfred Koelbl, Yuan Lu, Anmol Mathur
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    Simulation-based bug trace minimization with BMC-based refinement
    16 years 1 months ago
    Simulation-based bug trace minimization with BMC-based refinement
    Download  www.eecs.umich.edu
    Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
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    115
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    ICCAD
    2005
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    Discrete Vt assignment and gate sizing using a self-snapping continuous formulation
    16 years 4 months ago
    Discrete Vt assignment and gate sizing using a self-snapping continuous formulation
    Download  www-personal.umich.edu
    Saumil Shah, Ashish Srivastava, Dushyant Sharma, D...
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