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DATE
1998
IEEE
92views Hardware» more  DATE 1998»
15 years 10 months ago
Multiple Behavior Module Synthesis Based on Selective Groupings
In this paper, we present an approach to synthesize multiple behavior modules. Given n DFGs to be implemented, the previous methods scheduled each of them sequentially, and implem...
Ju Hwan Yi, Hoon Choi, In-Cheol Park, Seung Ho Hwa...
ASPDAC
1998
ACM
92views Hardware» more  ASPDAC 1998»
15 years 10 months ago
A New Design for Double Edge Triggered Flip-flops
-- The logic construction of a double-edge-triggered (DET) flip-flop, which can receive input signal at two levels of the clock, is analyzed and a new circuit design of CMOS DET fl...
Massoud Pedram, Qing Wu, Xunwei Wu
DATE
2011
IEEE
235views Hardware» more  DATE 2011»
14 years 9 months ago
An Overview of Approaches Towards the Timing Analysability of Parallel Architecture
In order to meet performance/low energy/integration requirements, parallel architectures (multithreaded cores and multi-cores) are more and more considered in the design of embedd...
Christine Rochange
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
14 years 9 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
SIGPLAN
1998
15 years 5 months ago
An Angry Half-Dozen
HardwareLimitedandHarlequinbothmarket commercialMLcompilers,eachbootstrappedinML. Insomecorners,functionallanguagesbearareputationforgrossinefficiency,butthisreputationisoutof dat...
Philip Wadler