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DATE
2010
IEEE
159views Hardware» more  DATE 2010»
15 years 11 months ago
A rapid prototyping system for error-resilient multi-processor systems-on-chip
—Static and dynamic variations, which have negative impact on the reliability of microelectronic systems, increase with smaller CMOS technology. Thus, further downscaling is only...
Matthias May, Norbert Wehn, Abdelmajid Bouajila, J...
GLVLSI
2010
IEEE
136views VLSI» more  GLVLSI 2010»
15 years 11 months ago
Thermal-aware compilation for system-on-chip processing architectures
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
Mohamed M. Sabry, José L. Ayala, David Atie...
ISPW
2010
IEEE
15 years 11 months ago
How to Welcome Software Process Improvement and Avoid Resistance to Change
Pressures for more complex products, customer dissatisfaction and problems related to cost and schedule overruns increase the need for effective management response and for improve...
Daniela Cristina Cascini Peixoto, Vitor A. Batista...
ITNG
2010
IEEE
15 years 11 months ago
Middleware Specialization for Product-Lines Using Feature-Oriented Reverse Engineering
Supporting the varied software feature requirements of multiple variants of a software product-line while promoting reuse forces product line engineers to use general-purpose, fea...
Akshay Dabholkar, Aniruddha S. Gokhale
EUROSYS
2010
ACM
15 years 11 months ago
NOVA: a microhypervisor-based secure virtualization architecture
The availability of virtualization features in modern CPUs has reinforced the trend of consolidating multiple guest operating systems on top of a hypervisor in order to improve pl...
Udo Steinberg, Bernhard Kauer