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DASFAA
2007
IEEE
174views Database» more  DASFAA 2007»
16 years 26 days ago
Efficient Holistic Twig Joins in Leaf-to-Root Combining with Root-to-Leaf Way
Finding all the occurrences of a twig pattern on multiple elements in an XML document is a core operation for efficient evaluation of XML queries. Holistic twig join algorithms, Tw...
Guoliang Li, Jianhua Feng, Yong Zhang, Lizhu Zhou
DATE
2007
IEEE
88views Hardware» more  DATE 2007»
16 years 26 days ago
Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann
DATE
2007
IEEE
150views Hardware» more  DATE 2007»
16 years 26 days ago
Assessing carbon nanotube bundle interconnect for future FPGA architectures
Field Programmable Gate Arrays (FPGAs) are important hardware platforms in various applications due to increasing design complexity and mask costs. However, as CMOS process techno...
Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen,...
DATE
2007
IEEE
106views Hardware» more  DATE 2007»
16 years 26 days ago
Low-cost protection for SER upsets and silicon defects
Extreme transistor scaling trends in silicon technology are soon to reach a point where manufactured systems will suffer from limited device reliability and severely reduced life...
Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kyp...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
16 years 26 days ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...