2593 search results - page 395 / 519 » constraints 2007 |
159
click to vote
DDECS
2007
IEEE
16 years 23 days ago
2007
IEEE
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
151
click to vote
DFT
2007
IEEE
16 years 23 days ago
2007
IEEE
During semiconductor manufacturing, particles undesirably depose on the surface of the wafer causing “open” and “short” defects to interconnects. In this paper, a third ty...
147
click to vote
DFT
2007
IEEE
16 years 23 days ago
2007
IEEE
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...
163
click to vote
DSN
2007
IEEE
16 years 23 days ago
2007
IEEE
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
184
click to vote
ECRTS
2007
IEEE
16 years 23 days ago
2007
IEEE
This paper investigates resource allocation policies for achieving real-time content distribution with subsecond delay bounds on the current Internet. Resource allocation in real-...