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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
We propose the redundancy identification of wire replacement faults. The solutions rely on the satisfiability (SAT) formulation of redundancy identification, augmented with the me...
152
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
180
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
134
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
A control part ? data path partition based sequential circuit verification scheme aimed at avoiding state explosion comprises two major modules namely, a data path verifier and a ...
181
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...