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IEEEPACT
2006
IEEE
16 years 25 days ago
Branch predictor guided instruction decoding
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
Oliverio J. Santana, Ayose Falcón, Alex Ram...
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IEEEPACT
2006
IEEE
16 years 25 days ago
Adaptive reorder buffers for SMT processors
In SMT processors, the complex interplay between private and shared datapath resources needs to be considered in order to realize the full performance potential. In this paper, we...
Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev
IISWC
2006
IEEE
16 years 25 days ago
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks
Many embedded real world applications are intellectual property, and vendors hesitate to share these proprietary applications with computer architects and designers. This poses a ...
Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., L...
IJCNN
2006
IEEE
16 years 25 days ago
Support Vector Machines to Weight Voters in a Voting System of Entity Extractors
—Support Vector Machines are used to combine the outputs of multiple entity extractors, thus creating a composite entity extraction system. The composite system has a significant...
Deborah Duong, James Venuto, Ben Goertzel, Ryan Ri...
IJCNN
2006
IEEE
16 years 25 days ago
An Architecture for Object-based Saccade Generation using a Biologically Inspired Self-organised Retina
— Our paper presents a fully automated computational mechanism for targeting a space-variant retina based on the highlevel visual content of a scene. Our retina’s receptive fie...
Sanjeeva Balasuriya, Paul Siebert
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