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DAC
2009
ACM
16 years 8 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DAC
2009
ACM
16 years 8 months ago
Interconnection fabric design for tracing signals in post-silicon validation
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
Xiao Liu, Qiang Xu
DAC
2009
ACM
16 years 8 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
DAC
2009
ACM
16 years 8 months ago
Generating test programs to cover pipeline interactions
Functional validation of a processor design through execution of a suite of test programs is common industrial practice. In this paper, we develop a high-level architectural speci...
Thanh Nga Dang, Abhik Roychoudhury, Tulika Mitra, ...
DAC
2009
ACM
16 years 8 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...
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