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ACMMSP
2006
ACM
247views Hardware» more  ACMMSP 2006»
16 years 17 days ago
A flexible data to L2 cache mapping approach for future multicore processors
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
Lei Jin, Hyunjin Lee, Sangyeun Cho
ANCS
2006
ACM
16 years 17 days ago
Sequence-preserving adaptive load balancers
Load balancing in packet-switched networks is a task of ever-growing importance. Network traffic properties, such as the Zipf-like flow length distribution and bursty transmissio...
Weiguang Shi, Lukas Kencl
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
16 years 17 days ago
High-level architecture exploration for MPEG4 encoder with custom parameters
Abstract - this paper proposes the use of a high-level architecture exploration method for different MPEG4 video encoders using different customization parameters. The targeted arc...
Marius Bonaciu, Aimen Bouchhima, Mohamed-Wassim Yo...
ASPDAC
2006
ACM
144views Hardware» more  ASPDAC 2006»
16 years 16 days ago
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits
Abstract— Substantial attention is being paid to the fault diagnosis problem in recent test literature. Yet, the compaction of test vectors for fault diagnosis is little explored...
Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahas...
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
16 years 16 days ago
The design and implementation of a low-latency on-chip network
— Many of the issues that will be faced by the designers of multi-billion transistor chips may be alleviated by the presence of a flexible global communication infrastructure. I...
Robert D. Mullins, Andrew West, Simon W. Moore