Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharide...
Although several analytical models have been proposed in the literature for different interconnection networks with deterministic routing, very few of them have considered the eff...
Formal and dynamic (simulation, emulation, etc.) verification techniques are both needed to deal with the overall challenge of verification. Ideally, the same specification/tes...
In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption....
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Z...
— This paper presents two contributions. The first is an incremental placement algorithm for placement-aware logic synthesis along with a proof of optimality. The algorithm can ...