Sciweavers

2163 search results - page 274 / 433
» cases 2004
Sort
View
DAC
2004
ACM
16 years 7 months ago
Architecture-level synthesis for automatic interconnect pipelining
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...
Jason Cong, Yiping Fan, Zhiru Zhang
DAC
2004
ACM
16 years 7 months ago
Adaptive data partitioning for ambient multimedia
In the near future, Ambient Intelligence (AmI) will become part of everyday life. Combining feature-rich multimedia with AmI (dubbed Ambient Multimedia for short) has the potentia...
Xiaoping Hu, Radu Marculescu
DAC
2004
ACM
16 years 7 months ago
Compact thermal modeling for temperature-aware design
Thermal design in sub-100nm technologies is one of the major challenges to the CAD community. In this paper, we first introduce the idea of temperature-aware design. We then propo...
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik ...
DAC
2004
ACM
16 years 7 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
DAC
2004
ACM
16 years 7 months ago
A method for correcting the functionality of a wire-pipelined circuit
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Vidyasagar Nookala, Sachin S. Sapatnekar