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ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 10 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
FDL
2004
IEEE
15 years 10 months ago
A Formal Verification Approach for IP-based Designs
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
Daniel Karlsson, Petru Eles, Zebo Peng
FTDCS
2004
IEEE
15 years 10 months ago
An Architectural View of the Entities Required for Execution of Task in Pervasive Space
Aimed to provide computation ubiquitously, pervasive computing is perceived as a means to provide an user the transparency of anywhere, anyplace, anytime computing. Pervasive comp...
K. Kalapriya, S. K. Nandy, V. Satish, R. Uma Mahes...
CORR
2004
Springer
140views Education» more  CORR 2004»
15 years 6 months ago
Checking modes of HAL programs
Recent constraint logic programming (CLP) languages, such as HAL and Mercury, require type, mode and determinism declarations for predicates. This information allows the generatio...
Maria J. García de la Banda, Warwick Harvey...
ICIP
2004
IEEE
16 years 8 months ago
Scalable coding of variable size blocks motion vectors
In this paper we discuss an algorithm that is able to provide a scalable (multiresolution) representation of the motion field information. It has been recently demonstrated that, ...
Davide Maestroni, Augusto Sarti, Marco Tagliasacch...