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TVLSI
2010
15 years 1 months ago
SRAM Read/Write Margin Enhancements Using FinFETs
Process-induced variations and sub-threshold leakage in bulk-Si technology limit the scaling of SRAM into sub-32 nm nodes. New device architectures are being considered to improve ...
Andrew Carlson, Zheng Guo, Sriram Balasubramanian,...
TVLSI
2010
15 years 1 months ago
Enhancing the Area Efficiency of FPGAs With Hard Circuits Using Shadow Clusters
There is a dramatic logic density gap between FPGAs and ASICs, and this gap is the main reason FPGAs are not cost-effective in high volume applications. Modern FPGAs narrow this ga...
Peter A. Jamieson, Jonathan Rose
TVLSI
2010
15 years 1 months ago
Discrete Buffer and Wire Sizing for Link-Based Non-Tree Clock Networks
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
Rupak Samanta, Jiang Hu, Peng Li
TWC
2010
15 years 1 months ago
Primary User Enters the Game: Performance of Dynamic Spectrum Leasing in Cognitive Radio Networks
Dynamic spectrum leasing (DSL) is one of the schemes proposed for dynamic spectrum sharing (DSS) in cognitive radio networks. In DSL, spectrum owners, denoted as primary users, dyn...
Gonzalo Vazquez-Vilar, Carlos Mosquera, Sudharman ...
TWC
2010
15 years 1 months ago
Performance of asynchronous two-relay two-hop wireless cooperative networks
In wireless cooperative networks, the asynchronism between the relays can be a source of diversity which is similar in its essence to the multipath diversity of frequency selectiv...
Michel Nahas, Ahmed Saadani, Walid Hachem
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