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2009
IEEE
147views Hardware» more  DATE 2009»
16 years 1 months ago
Decoupling capacitor planning with analytical delay model on RLC power grid
— Decoupling capacitors (decaps) are typically used to reduce the noise in the power supply network. Because the delay of gates and interconnects is affected by the supply voltag...
Ye Tao, Sung Kyu Lim
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
16 years 1 months ago
Error correction in single-hop wireless sensor networks - A case study
—Energy efficient communication is a key issue in wireless sensor networks. Common belief is that a multi-hop configuration is the only viable energy efficient technique. In t...
Daniel Schmidt 0001, Matthias Berning, Norbert Weh...
DATE
2009
IEEE
112views Hardware» more  DATE 2009»
16 years 1 months ago
Algebraic techniques to enhance common sub-expression elimination for polynomial system synthesis
: Common sub-expression elimination (CSE) serves as a useful optimization technique in the synthesis of arithmetic datapaths described at RTL. However, CSE has a limited potential ...
Sivaram Gopalakrishnan, Priyank Kalla
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
16 years 1 months ago
A power-efficient migration mechanism for D-NUCA caches
D-NUCA L2 caches are able to tolerate the increasing wire delay effects due to technology scaling thanks to their banked organization, broadcast line search and data promotion/dem...
Alessandro Bardine, Manuel Comparetti, Pierfrances...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
16 years 1 months ago
A set-based mapping strategy for flash-memory reliability enhancement
—With wide applicability of flash memory in various application domains, reliability has become a very critical issue. This research is motivated by the needs to resolve the lif...
Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, Tei...