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DATE
2009
IEEE
136views Hardware» more  DATE 2009»
16 years 1 months ago
A novel approach to entirely integrate Virtual Test into test development flow
– In this paper, we present an open architecture Virtual Test Environment (VTE) which can be easily integrated into various modularized Automatic Test Systems (ATS) compliant to ...
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus H...
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
16 years 1 months ago
Trace signal selection for visibility enhancement in post-silicon validation
Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. One effective silicon debug ...
Xiao Liu, Qiang Xu
DATE
2009
IEEE
125views Hardware» more  DATE 2009»
16 years 1 months ago
Finite precision processing in wireless applications
—Complex signal processing algorithms are often specified in floating point precision. Thus, a type conversion is needed when the targeted platform requires fixed-point precis...
David Novo, Min Li, Bruno Bougard, Liesbet Van der...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 1 months ago
Exploiting structure in an AIG based QBF solver
—In this paper we present a procedure for solving quantified boolean formulas (QBF), which uses And-Inverter Graphs (AIGs) as the core data-structure. We make extensive use of s...
Florian Pigorsch, Christoph Scholl
DATE
2009
IEEE
79views Hardware» more  DATE 2009»
16 years 1 months ago
Solver technology for system-level to RTL equivalence checking
—Checking the equivalence of a system-level model against an RTL design is a major challenge. The reason is that usually the system-level model is written by a system architect, ...
Alfred Kölbl, Reily Jacoby, Himanshu Jain, Ca...