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CAV
2009
Springer
206views Hardware» more  CAV 2009»
16 years 7 months ago
D-Finder: A Tool for Compositional Deadlock Detection and Verification
D-Finder tool implements a compositional method for the verification of component-based systems described in BIP language encompassing multi-party interaction. For deadlock detecti...
Saddek Bensalem, Marius Bozga, Thanh-Hung Nguyen, ...
CAV
2009
Springer
133views Hardware» more  CAV 2009»
16 years 7 months ago
Cardinality Abstraction for Declarative Networking Applications
ity Abstraction for Declarative Networking Applications Juan A. Navarro P?erez, Andrey Rybalchenko, and Atul Singh Max Planck Institute for Software Systems (MPI-SWS) Declarative N...
Andrey Rybalchenko, Atul Singh, Juan Antonio Navar...
HPCA
2009
IEEE
16 years 7 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
HPCA
2009
IEEE
16 years 7 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
HPCA
2009
IEEE
16 years 7 months ago
In-Network Snoop Ordering (INSO): Snoopy coherence on unordered interconnects
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
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