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DATE
2008
IEEE
163views Hardware» more  DATE 2008»
16 years 1 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
DATE
2008
IEEE
182views Hardware» more  DATE 2008»
16 years 1 months ago
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking
— As the feature size of transistors gets smaller, fabricating them becomes challenging. Manufacturing process follows various corrective design-for-manufacturing (DFM) steps to ...
Swaroop Ghosh, Patrick Ndai, Kaushik Roy
DSD
2008
IEEE
166views Hardware» more  DSD 2008»
16 years 1 months ago
Pearson - based Analysis of Positioning Error Distribution in Wireless Sensor Networks
Abstract—In two recent contributions [1], [2], we have provided a comparative analysis of various optimization algorithms, which can be used for atomic location estimation, and s...
Stefano Tennina, Marco Di Renzo, Fabio Graziosi, F...
FGR
2008
IEEE
229views Biometrics» more  FGR 2008»
16 years 1 months ago
A high-resolution 3D dynamic facial expression database
Face information processing relies on the quality of data resource. From the data modality point of view, a face database can be 2D or 3D, and static or dynamic. From the task poi...
Lijun Yin, Xiaochen Chen, Yi Sun, Tony Worm, Micha...
FOCS
2008
IEEE
16 years 1 months ago
Degree Bounded Network Design with Metric Costs
Given a complete undirected graph, a cost function on edges and a degree bound B, the degree bounded network design problem is to find a minimum cost simple subgraph with maximum...
Yuk Hei Chan, Wai Shing Fung, Lap Chi Lau, Chun Ko...
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