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LCN
2005
IEEE
16 years 11 days ago
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
16 years 11 days ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....
MSS
2005
IEEE
62views Hardware» more  MSS 2005»
16 years 11 days ago
Predictive Reduction of Power and Latency (PuRPLe)
Increasing efforts have been aimed towards the management of power as a critical system resource, and the disk can consume approximately a third of the power required for a typica...
Matthew Craven, Ahmed Amer
NDSS
2005
IEEE
16 years 11 days ago
One-Way Isolation: An Effective Approach for Realizing Safe Execution Environments
In this paper, we present an approach for realizing a safe execution environment (SEE) that enables users to “try out” new software (or configuration changes to existing soft...
Weiqing Sun, Zhenkai Liang, V. N. Venkatakrishnan,...
RTAS
2005
IEEE
16 years 11 days ago
Feedback-Based Dynamic Voltage and Frequency Scaling for Memory-Bound Real-Time Applications
Dynamic voltage and frequency scaling is increasingly being used to reduce the energy requirements of embedded and real-time applications by exploiting idle CPU resources, while s...
Christian Poellabauer, Leo Singleton, Karsten Schw...
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