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ISSS
2002
IEEE
103views Hardware» more  ISSS 2002»
15 years 11 months ago
A Symbolic Approach for the Combined Solution of Scheduling and Allocation
Scheduling is widely recognized as a very important step in highlevel synthesis. Nevertheless, it is usually done without taking into account the effects on the actual hardware im...
Luciano Lavagno, Mihai T. Lazarescu, Stefano Quer,...
ECRTS
1999
IEEE
15 years 11 months ago
Distributed real-time task monitoring in the safety-critical system Melody
Safety-critical systems typically operate in unpredictable environments. Requirements for safety and reliability are in conflict with those for real-time responsiveness. Due to un...
Horst F. Wedde, Jon A. Lind, Guido Seghert
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
15 years 11 months ago
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
Akihiro Tsutsui, Toshiaki Miyazaki
IPPS
1994
IEEE
15 years 11 months ago
AVL Trees with Relaxed Balance
AVL trees with relaxed balance were introduced with the aim of improving runtime performance by allowing a greater degree of concurrency. This is obtained by uncoupling updating f...
Kim S. Larsen
ISCA
1994
IEEE
93views Hardware» more  ISCA 1994»
15 years 11 months ago
RAID-II: A High-Bandwidth Network File Server
In 1989, the RAID (Redundant Arrays of Inexpensive Disks) group at U. C. Berkeley built a prototype disk array called RAID-I. The bandwidth delivered to clients by RAID-I was seve...
Ann L. Drapeau, Ken Shirriff, John H. Hartman, Eth...